Inventor Anthony Paul Bellezza, owner of Bellezza Technologies, has pioneered a novel 2D graphene fusion process for semiconductor assembly, operating at low temperatures, which may hold great potential for CMOS chip manufacturing. This innovative process addresses the longstanding challenge of integrating graphene into circuits.
On his innovative graphene fusion process, Belleza said: "My method enables the utilization of 2D graphene as an interconnect material in semiconductor circuits, forming a low-resistance, metallurgical bond with the substrate. This advancement will lead to the production of faster and more efficient computers by replacing traditional copper circuits, which are approaching their physical limitations".
The process fuses interconnects at temperatures within the thermal budget of the chip below 400 degrees C and can work at temperatures as low as 200 degrees C. The interconnect electrical resistance is almost undetectable; this will allow faster computers to be produced that operate at lower temperatures as graphene is also an excellent disperser of heat produced by the chips. The patent process could extend Moore’s law and could in time eliminate copper circuits that will be replaced by graphene as the copper circuit size is now at the limit. Thinner, copper micro circuits increase electrical resistance.
The fusion process, according to Belleza, is the only process in the world that can use 2D graphene for circuit interconnects at low temperature assembling of CMOS Chips. This is done by changing the crystalline structure of the substrate metal which is Iron/Nickel plating. The substrate is prepared by physically rolling or cryogenically treating for only seconds to form Martensite crystals that will absorb carbon graphene when heated. This type of process has been used for several hundred years in heat-treating Carbonization of Steel, but Belleza believes he is the first in the world to use this heat-treating process for microelectronic circuits. The fusion created is a true metallurgical union as the graphene becomes an alloy fused to the substrate and CMOS Chips. The interface has very low electrical resistance that increases the speed of the circuit. The process can be used for all circuits in semiconductors.
"I have researched the use of this type of fused interconnects in my other patents found on my Website. The solderless Thermoelectric Generator was the start of this research in 2007 now patent US10,756,248 followed by patent US11,380,833. I received two granted fusion patents in 2018 and 2021. My fusion patents US10,937,940 and US10,096,761 are the basis of my current work with several more fusion patent applications to be filed soon".
