Researchers from Shanghai Jiao Tong University and Shanghai Electric Power Generation Equipment have developed a multilayer graphene-based thermally conductive and electrically insulating tape (MTCEIT) that achieves a combination of lateral heat spreading capability and dielectric integrity for compact, high-power electronic systems.
The continuous miniaturization of integrated devices, accompanied by exponentially increasing power densities, imposes stringent requirements on thermal interface materials (TIMs) that must efficiently dissipate heat while providing strong electrical insulation within submillimeter thickness constraints. Conventional polymer composites and ceramic-filled films struggle to meet these competing demands, typically exhibiting in-plane thermal conductivities below 70 W m⁻¹ K⁻¹ once their thickness exceeds 200 µm. To overcome this limitation, the MTCEIT integrates graphene paper - a stacked and compressed assembly of two-dimensional graphene sheets - as a high-efficiency lateral heat spreading layer.
This core is encapsulated between boron nitride nanosheet (BNNS)-filled polymer nanocomposite adhesives and coupled in series with an external boron nitride flake (BNF)-reinforced silicone composite film. The architecture exploits graphene’s superior phonon transport along the basal plane (κ∥ ≈ 578 W m⁻¹ K⁻¹) while using hexagonal boron nitride to maintain electrical isolation via its wide bandgap (~5.9 eV) and high dielectric breakdown strength.
At an overall thickness of approximately 300 µm, the MTCEIT reaches an in-plane thermal conductivity of 121.22 W m⁻¹ K⁻¹ and a through-plane thermal conductivity of 1.3 W m⁻¹ K⁻¹. Its electrical resistivity remains high (5.07 × 10¹¹ Ω·cm), with a Weibull characteristic breakdown strength of 36.9 kV mm⁻¹. These properties substantially exceed those of conventional flexible dielectric films at comparable thicknesses, establishing the multilayer architecture as a capable thermal conductor-insulator hybrid.
Interfacial engineering plays a major role in achieving this performance. The adhesive phase - poly(2‑butylamino carbonyl oxy ethyl acrylate) (PBCOEA) loaded with 10 wt% BNNS - forms extensive hydrogen-bond networks that facilitate efficient phonon coupling at the graphene-polymer boundary. Thermal contact resistance between the adhesive and copper substrate is minimized to 8.9 mm² K W⁻¹ without additional pressure. The BN-filled silicone exterior, containing ~70 wt% boron nitride flakes, contributes to mechanical resilience and electrical shielding while preserving high cross-plane stability.
Structural characterization demonstrates excellent interlayer adhesion and mechanical flexibility. The multilayer tape withstands bending radii of ~5 mm and tensile elongations above 900%, without delamination or interface failure. Tensile strength reaches 9 MPa for a 100 µm graphene core, confirming robust mechanical anchoring within the composite stack. The tape exhibits negligible performance degradation up to 260 °C, with κ∥ = 87 W m⁻¹ K⁻¹ at 135 °C, confirming its potential for high-temperature electronic environments.
Finite-element thermal modeling and experimental verification reveal that the optimized graphene fraction and interfacial conductivity drastically reduce hotspot formation. In a thin laptop system, integration of the MTCEIT lowered CPU steady-state temperature by 9 °C relative to conventional thermal films, while maintaining a uniform temperature field across the heat-spreading zone. In a fanless ultrathin smartphone, a 285 µm-thick strip reduced peak SoC temperature by 5.4 °C, maintaining stable frame output (≤ 0.1 fps variation) during 4K playback-demonstrating effective passive heat dissipation under transient high loads.
Design optimization indicates that performance enhancement primarily depends on minimizing interlayer resistance rather than merely increasing total graphene content. Excessive lamination introduces phonon scattering at interfaces that offset thickness gains. Likewise, beyond ~70 wt% BN loading, mechanical flexibility decreases rapidly without proportional thermal benefit.
The MTCEIT can be fabricated through scalable manufacturing routes such as doctor blading, hot pressing, and roll-to-roll lamination, utilizing industrially available raw materials. This establishes a practical foundation for mass production of high-performance thermally conductive-insulating films applicable to consumer electronics, power modules, and flexible circuitry.
This work highlights the role of graphene-centric composite architectures in bridging the gap between high heat flux management and dielectric safety. The material’s hierarchical structure - spanning atomic-scale phonon interfaces to macroscale flexibility - exemplifies next-generation TIM design, where engineered nanostructure alignment enables simultaneous optimization of heat conduction and electrical insulation in demanding miniaturized electronics.
