UCLA researchers developed a scalable approach to fabricate high-speed (over 50Ghz) graphene transistors

A research team from UCLA announce they have developed a scalable approach to fabricate high-speed graphene transistors. Back in September 2010, this team developed 300Ghz graphene transistors, making them using a nanowire as the self-aligned gate.

The new approach uses a dielectrophoresis assembly approach to precisely place nanowire gate arrays on large-area chemical vapor depositiongrowth graphene (as opposed to mechanically peeled graphene flakes) to enable the rational fabrication of high-speed transistor arrays. This was made on a glass substrate. The new transistors have cut-off frequencies of over 50Ghz (typical graphene transistors made on silicon have cut-off frequencies of less then 10 Ghz).

The team used these transistors to construct radio-frequency circuits functioning up to 10 GHz.

Posted: Jun 17,2011 by Ron Mertens