Researchers from the A*STAR Institute of Materials Research and Engineering and the National University of Singapore have developed an improved design for a Graphene based field-effect transistor (FET). The new device includes an additional silicon dioxide (SiO2) dielectric gate below the graphene layer. This allows for simplified bit writing by providing an additional background source of charge carriers.
The new device can lead the way towards ;graphene–ferroelectric FETs to be used for nonvolatile memory. The researchers say that the new design achieved impressive practical results - symmetrical bit writing with a resistance ratio between the two resistance states of over 500% and reproducible nonvolatile switching over 100,000 cycles.